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Front End with 3 Power Output Management

This chip is an UHF RF Front End designed to work under the EPC C1G2 standard. It can be used as a transceiver and has the capability of supplying power to an external component because it acts as an RF energy harvester. The IC uses a very sensitive ASK demodulator and a PSK modulator with a backscattering phase shift over 60 degrees.

 

The chip has a set of three LDO outputs, 1.2V, 1.8V and 2.5V which can supply up to 100µA, 100µA and 1mA continuously. Its energy harvester condition allows it to transfer energy from the RF signal through an antenna to an external device of our choice.

 

The front end has some extra I/Os for its integration with a digital controller such as a FPGA or a MCU if wanted:

 

  • Each of the LDOs has its own power-good signal to indicate the LDO's stability
  • Reset signal for the stability of the chip's start-up
  • Clock output signal
  • Voltage reference 

 

 

The clock signal can be suppressed if it is not required, reducing power consumption significantly.

 

I/Os voltage is variable and can be supplied to any voltage between 1.2V and 3.6V, which gives the device a great versatility. I/Os can be supplied from the LDO outputs if desired.

 

You can find technical details on the following table:

 

Specification

Data

Units

Operating frequency

868 – 915

MHz

Standard

EPC C1G2

-

Quiescent current

6µA@3V

-

CLK

2±1*

MHz

Operating temperature

-40 to 85

°C

RX sensitivity

+20 to -5  (battery-less)

dBm (ASK)

Backscattering phase shift

60

degrees (PSK)

RX data frequency

160

KHz

TX data frequency

640

KHz

VDD pads voltage

1.2 to 3.6

V

Size (die/core)

2x1.9 / 1.7x1.3

mm

*Clock output dissabled 

 

 

For an easy understanding of the system operation, check the following video: